CWE-1245 Base Incomplete

Improper Finite State Machines (FSMs) in Hardware Logic

This vulnerability occurs when hardware logic contains flawed Finite State Machines (FSMs). Attackers can exploit these design errors to force the system into an undefined or unstable condition,…

Definition

What is CWE-1245?

This vulnerability occurs when hardware logic contains flawed Finite State Machines (FSMs). Attackers can exploit these design errors to force the system into an undefined or unstable condition, potentially leading to a denial of service (DoS) or allowing privilege escalation.
Finite State Machines are critical for managing a system's security posture and operational flow. They often control access to sensitive data and govern secure operations. If an FSM is poorly designed—for example, by leaving states undefined or incorrectly implementing transitions—an attacker can manipulate it into a deadlock or unrecoverable error state. This typically crashes the affected component or requires a full system reset to restore functionality, resulting in a denial of service. The security impact escalates when FSMs are used to enforce privilege levels or authorization checks. By driving the FSM into an unintended state, an attacker might bypass security gates, gain elevated privileges, or corrupt secure data transfers. This initial compromise can then serve as a foothold to launch further attacks, ultimately undermining the hardware's intended security guarantees.
Real-world impact

Real-world CVEs caused by CWE-1245

No public CVE references are linked to this CWE in MITRE's catalog yet.

How attackers exploit it

Step-by-step attacker path

  1. 1

    Identify a code path that handles untrusted input without validation.

  2. 2

    Craft a payload that exercises the unsafe behavior — injection, traversal, overflow, or logic abuse.

  3. 3

    Deliver the payload through a normal request and observe the application's reaction.

  4. 4

    Iterate until the response leaks data, executes attacker code, or escalates privileges.

Vulnerable code example

Vulnerable Verilog

The Finite State Machine (FSM) shown in the "bad" code snippet below assigns the output ("out") based on the value of state, which is determined based on the user provided input ("user_input").

Vulnerable Verilog 
module fsm_1(out, user_input, clk, rst_n); 
  input [2:0] user_input; 
  input clk, rst_n; 
  output reg [2:0] out; 
  reg [1:0] state; 
  always @ (posedge clk or negedge rst_n ) 
  	begin 
  		 if (!rst_n)
  			 state = 3'h0; 
  		 else
  		 case (user_input) 
  			 3'h0:
  			 3'h1:
  			 3'h2:
  			 3'h3: state = 2'h3;
  			 3'h4: state = 2'h2;
  			 3'h5: state = 2'h1;
  		 endcase 
  	 end
  	 out <= {1'h1, state};
   endmodule
Secure code example

Secure Verilog

The case statement does not include a default to handle the scenario when the user provides inputs of 3'h6 and 3'h7. Those inputs push the system to an undefined state and might cause a crash (denial of service) or any other unanticipated outcome. Adding a default statement to handle undefined inputs mitigates this issue. This is shown in the "Good" code snippet below. The default statement is in bold.

Secure Verilog 
case (user_input) 
  	3'h0: 
  	3'h1: 
  	3'h2: 
  	3'h3: state = 2'h3; 
  	3'h4: state = 2'h2; 
  	3'h5: state = 2'h1; 
```
default: state = 2'h0;**  endcase
What changed: the unsafe sink is replaced (or the input is validated/escaped) so the same payload no longer triggers the weakness.
Prevention checklist

How to prevent CWE-1245

  • Architecture and Design / Implementation Define all possible states and handle all unused states through default statements. Ensure that system defaults to a secure state.
Detection signals

How to detect CWE-1245

SAST High

Run static analysis (SAST) on the codebase looking for the unsafe pattern in the data flow.

DAST Moderate

Run dynamic application security testing against the live endpoint.

Runtime Moderate

Watch runtime logs for unusual exception traces, malformed input, or authorization bypass attempts.

Code review Moderate

Code review: flag any new code that handles input from this surface without using the validated framework helpers.

Plexicus auto-fix

Plexicus auto-detects CWE-1245 and opens a fix PR in under 60 seconds.

Codex Remedium scans every commit, identifies this exact weakness, and ships a reviewer-ready pull request with the patch. No tickets. No hand-offs.

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Frequently asked questions

Frequently asked questions

What is CWE-1245?

This vulnerability occurs when hardware logic contains flawed Finite State Machines (FSMs). Attackers can exploit these design errors to force the system into an undefined or unstable condition, potentially leading to a denial of service (DoS) or allowing privilege escalation.

How serious is CWE-1245?

MITRE has not published a likelihood-of-exploit rating for this weakness. Treat it as medium-impact until your threat model proves otherwise.

What languages or platforms are affected by CWE-1245?

MITRE lists the following affected platforms: Not OS-Specific, Not Architecture-Specific, System on Chip.

How can I prevent CWE-1245?

Define all possible states and handle all unused states through default statements. Ensure that system defaults to a secure state.

How does Plexicus detect and fix CWE-1245?

Plexicus's SAST engine matches the data-flow signature for CWE-1245 on every commit. When a match is found, our Codex Remedium agent opens a fix PR with the corrected code, tests, and a one-line summary for the reviewer.

Where can I learn more about CWE-1245?

MITRE publishes the canonical definition at https://cwe.mitre.org/data/definitions/1245.html. You can also reference OWASP and NIST documentation for adjacent guidance.

Related weaknesses

Weaknesses related to CWE-1245

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CWE-451 Sibling

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Hidden Functionality

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Further reading

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