Review address map in specification to see if there are any overlapping ranges.
CWE-1316 Base Draft
Fabric-Address Map Allows Programming of Unwarranted Overlaps of Protected and Unprotected Ranges
This vulnerability occurs when a hardware fabric's address map incorrectly allows protected and unprotected memory regions to overlap. Attackers can exploit this overlap to bypass security controls…
Definition
What is CWE-1316?
This vulnerability occurs when a hardware fabric's address map incorrectly allows protected and unprotected memory regions to overlap. Attackers can exploit this overlap to bypass security controls and access restricted data or functions.
In system-on-chip (SoC) designs, the address map defines protected and unprotected ranges for memory and memory-mapped I/O (MMIO). These ranges, often set by base and size registers, are meant to enforce isolation—keeping sensitive data in access-controlled areas. However, if these ranges are programmed to overlap, either accidentally through a design error or intentionally via malicious software in dynamically reconfigurable systems, the hardware's access control logic can become confused.
When a protected range overlaps with an unprotected one, an attacker can craft transactions targeting the overlapping address space. Since the unprotected path provides a valid route, the hardware may fail to apply the proper security checks, allowing unauthorized access. This breach violates the core security principle of least privilege, as the overlap creates a backdoor that circumvents the intended protection mechanisms.
Real-world impact
Real-world CVEs caused by CWE-1316
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Attacker can modify MCHBAR register to overlap with an attacker-controlled region, which modification prevents the SENTER instruction from properly applying VT-d protection while a Measured Launch Environment is being launched.
How attackers exploit it
Step-by-step attacker path
- 1
An on-chip fabric supports a 64KB address space that is memory-mapped. The fabric has two range registers that support creation of two protected ranges with specific size constraints--4KB, 8KB, 16KB or 32KB. Assets that belong to user A require 4KB, and those of user B require 20KB. Registers and other assets that are not security-sensitive require 40KB. One range register is configured to program 4KB to protect user A's assets. Since a 20KB range cannot be created with the given size constraints, the range register for user B's assets is configured as 32KB. The rest of the address space is left as open. As a result, some part of untrusted and open-address space overlaps with user B range.
- 2
The fabric does not support least privilege, and an attacker can send a transaction to the overlapping region to tamper with user B data.
- 3
Since range B only requires 20KB but is allotted 32KB, there is 12KB of reserved space. Overlapping this region of user B data, where there are no assets, with the untrusted space will prevent an attacker from tampering with user B data.
Vulnerable code example
Vulnerable pseudo
MITRE has not published a code example for this CWE. The pattern below is illustrative — see Resources for canonical references.
// Example pattern — see MITRE for the canonical references.
function handleRequest(input) {
// Untrusted input flows directly into the sensitive sink.
return executeUnsafe(input);
} Secure code example
Secure pseudo
// Validate, sanitize, or use a safe API before reaching the sink.
function handleRequest(input) {
const safe = validateAndEscape(input);
return executeWithGuards(safe);
} What changed: the unsafe sink is replaced (or the input is validated/escaped) so the same payload no longer triggers the weakness.
Prevention checklist
How to prevent CWE-1316
- Architecture and Design When architecting the address map of the chip, ensure that protected and unprotected ranges are isolated and do not overlap. When designing, ensure that ranges hardcoded in Register-Transfer Level (RTL) do not overlap.
- Implementation Ranges configured by firmware should not overlap. If overlaps are mandatory because of constraints such as a limited number of registers, then ensure that no assets are present in the overlapped portion.
- Testing Validate mitigation actions with robust testing.
Detection signals
How to detect CWE-1316
Negative testing of access control on overlapped ranges.
Plexicus auto-detects CWE-1316 and opens a fix PR in under 60 seconds.
Codex Remedium scans every commit, identifies this exact weakness, and ships a reviewer-ready pull request with the patch. No tickets. No hand-offs.
Frequently asked questions What is CWE-1316?
How serious is CWE-1316?
What languages or platforms are affected by CWE-1316?
How can I prevent CWE-1316?
How does Plexicus detect and fix CWE-1316?
Where can I learn more about CWE-1316?
Frequently asked questions
What is CWE-1316?
This vulnerability occurs when a hardware fabric's address map incorrectly allows protected and unprotected memory regions to overlap. Attackers can exploit this overlap to bypass security controls and access restricted data or functions.
How serious is CWE-1316?
MITRE has not published a likelihood-of-exploit rating for this weakness. Treat it as medium-impact until your threat model proves otherwise.
What languages or platforms are affected by CWE-1316?
MITRE lists the following affected platforms: Not OS-Specific, Not Architecture-Specific, Bus/Interface Hardware, Not Technology-Specific.
How can I prevent CWE-1316?
When architecting the address map of the chip, ensure that protected and unprotected ranges are isolated and do not overlap. When designing, ensure that ranges hardcoded in Register-Transfer Level (RTL) do not overlap. Ranges configured by firmware should not overlap. If overlaps are mandatory because of constraints such as a limited number of registers, then ensure that no assets are present in the overlapped portion.
How does Plexicus detect and fix CWE-1316?
Plexicus's SAST engine matches the data-flow signature for CWE-1316 on every commit. When a match is found, our Codex Remedium agent opens a fix PR with the corrected code, tests, and a one-line summary for the reviewer.
Where can I learn more about CWE-1316?
MITRE publishes the canonical definition at https://cwe.mitre.org/data/definitions/1316.html. You can also reference OWASP and NIST documentation for adjacent guidance.
Related weaknesses
Weaknesses related to CWE-1316
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